Lead RTL Design Engineer for Next-Gen IoT Chips, Zürich (Kreis 11)

Sequans Communications Limited is hiring for a position within their VLSI team in Zürich. Responsibilities include specifying, designing, and verifying digital blocks for new chipset generations. Candidates should have a degree in computer science or electrical engineering and at least 5 years of experience in ASIC/FPGA development.Key skills include proficiency in hardware description languages and experience in optimization techniques. The role demands excellent communication skills and the ability to work in a multicultural environment.

#J-18808-Ljbffr