SoC design engineer, Geneva

We are excited to offer a unique opportunity to become part of the Microelectronics Section within the Electronic Systems for Experiments (ESE) group at CERN. As a member of the RIGOLETTO project, funded under the HORIZON‑Chips JU programme, you will play an active role in the development of an open‑source software tool designed to generate System‑On‑Chip (SoC) circuits for ASIC embedded applications.This tool, named SoCMAKE, is based on the PeakRDL framework and is being developed in‑house by CERN’s EP‑ESE group. Your contributions will directly support the advancement of highly resilient electronic systems used in some of the most demanding experimental environments. By the application deadline,

you have a

maximum of two years of professional experience since graduation

in Electronics/Computer Science/Physics (or a related field)

and your highest educational qualification is either a Bachelor's or Master's degree . You have never had a CERN fellow or graduate contract before. Applicants without University degree are not eligible.

#J-18808-Ljbffr